The present invention concerns a multiplexing device for providing a digital cross connect and add/drop functionality to a SONET and/or SDH compliant signal intercon- nection device. The invention more particularly relates to a modular, non-blocking, expandable, digital interconnection system capable of cross-connecting lower-rate signals (tributaries), where these signals are components of higher rate signals, or may terminate on low speed lines (local ports). It even more specifically concerns a multi- plexing device for a SONET/SDH interconnection circuit employing like modules arranged in parallel, with the number of modules depending on the transmission speed of the SONET/SDH links served.
The American National Standards Institute has recently established a new basic standard for high-speed, multiplexed digital data transmission. This is the xe2x80x9csynchronous optical networkxe2x80x9d standard, henceforth referred to as SONET. The SONET standard specifies optical interfaces, data rates, operation procedures and frame structures for multiplexed digital transmission via fiber optic networks.
The International Telecommunications Union (ITU) has adopted the interface principles of SONET and recommended a new global transmission standard for high-speed digital data transmission. This standard is the xe2x80x9csynchronous digital hierarchyxe2x80x9d (SDH).
For an account of the SDH standard on the xe2x80x9cGeneral Aspects of Digital Transmission Systemsxe2x80x9d, reference is made to the ITU standards documents G.707 (Synchronous Digital Hierarchy Bit Rates), G.708 (Network Node Interface for the Synchronous Digital Hierarchy), G.709 (Synchronous Multiplexing Structure), G.782 (Types and General Characteristics of Synchronous Digital Hierarchy (SDH) Equipment), and G.783 (Characteristics of Synchronous Digital Hierarchy (SDH) Equipment Functional Blocks), all issued March 1993.
The SDH standard is designed to enable manufacturers to develop telecommunications equipment which:
a) will be interchangeable in all telecommunication networks built around the world to its standard; and which
b) is backwards compatible, i.e. can be used with data which is in the older telecommunications formats used in North America, Europe and Japan.
This is achieved by a hierarchy of so-called xe2x80x9cContainersxe2x80x9d (C) and xe2x80x9cVirtual Containersxe2x80x9d (VC), see FIG. 1. The containers, e.g. C-4, C-3, C-12, etc., are information structures designed to accommodate data traffic with specific transmission rates. The. C-4 container carries traffic with a base rate of up to 139 264 kbit/s, C-3 carries either up to 44 736 or 34 368 kbit/s, etc. The containers are turned into virtual containers by adding xe2x80x9cPath Overheadxe2x80x9d information (POH) to it. By procedures defined as multiplexing, mapping, or aligning, data structures are generated which are constitutive to the SDH. These data structures are named xe2x80x9cAdministrative Unit Groupsxe2x80x9d (AUG) and xe2x80x9cSynchronous Transport Modulexe2x80x9d (STM). The label of an STM is defined by the number of AUGs it carries: a STM-4 contains for example four AUGs. An AUG contains either one xe2x80x9cAdministration Unitxe2x80x9d (AU) of type 4 or three AU-3. Referring to the simplest case, in turn one AU-4 contains one C-4 signal and one AU-3 carries one C-3 signal.
The SDH/SONET data frames, i.e., the STM-N signals, are 125 msec long. The amount of data transmitted in each frame depends on the hierarchy level N of the signal. The higher hierarchical levels are transmitted at higher data rates than the basic STM-1 level of approximately 155 Mbit/s. (The exact transmission rate is defined as 155.52 Mbit/s. However here and in the following transmission rates are often denoted by their approximate values. This in particular due to the fact that the exact data transmission rates are distorted by overhead data traffic and idle cell stuffing.) The integer N indicates how many times faster the data is transmitted than in the STM-1 level. For example STM-4 denotes a data transmission rate of 622 Mbit/s, whereby each data frame contains four times as many bytes as does a frame of STM-1. Currently, the highest defined level is STM-64 which has a data rate of 9.95 Gb/s. Clearly, each part of the STM-N signal is broadcast in the same time as the corresponding part of an STM-1 signal, but contains N times as many bytes.
The STM-1 signal, as shown in FIG. 2, contains an information rectangle of 9 rows with 270 bytes/row corresponding to a SONET/SDH data rate of 155.52 Mbit/s. The first 9 bytes/row represent the xe2x80x9cSection Overheadxe2x80x9d, henceforth SOH. The remaining 261 bytes/row are reserved for the VCs, which in FIG. 1 is a VC-4. The first column of a VC-4 container consists of the xe2x80x9cPath Overheadxe2x80x9d (POH). The rest is occupied by the payload (a C-4 signal). Several VCs can be concatenated to provide a single transmission channel with a corresponding bandwidth. For example, four VC-4 in a STM-4 signal can be concatenated to form a single data channel with approximately 600 Mbit/s capacity: in this case the four VC are referred to in the standard terminology as VC-4-4c and the signal as STM-4c. 
This flexibility of the SDH standard is partly due to the pointer concept. In SDH, the frames are synchronized, but the VCs within them are not locked to the frames. So the individual containers of the SDH signals do not have to be frame aligned or synchronized among each other. A xe2x80x9cpointerxe2x80x9d is provided in the Section Overhead which indicates the position of the above introduced POH, i.e. the start of a virtual container in the SDH frame. The POH can thus be flexibly positioned at any position in the frame. The multiplexing of information into higher order SDH frames becomes simpler than in the old data standards, and an expensive synchronization buffer is not required in SDH. Similarly, lower order signals can be extracted out of and inserted into the higher order SDH signals without the need to demultiplex the entire signal hierarchy. The pointers are stored in the fourth row of the Section Overhead.
The Section Overhead is further subdivided into:
I. The xe2x80x9cRegenerator Section Overheadxe2x80x9d or RSOH. This contains bytes of information which are used by repeater stations along the route traversed by the SONET/SDH Signal. The Regenerator Section Overhead occupies rows 1-3 of the Section Overhead.
II. The xe2x80x9cMultiplexer Section Overheadxe2x80x9d or MSOH. This contains bytes of information used by the multiplexers along the SONET/SDH signal""s route. The Multiplexer Section Overhead occupies rows 5-9 of the Section Overhead. These sections are assembled and dissembled at different stages during the transmission process. FIG. 2 also shows an exploded view of the MSOH.
In the SONET system, a base signal of 51.84 Mbit/s is used. It is called the Synchronous Transport Signal level 1, henceforth STS-1. This has an information rectangle of 9 rows with 90 bytes/row. The first three bytes/row are the section overhead and the remaining 87 bytes/row are the xe2x80x9cSynchronous Payload Envelopexe2x80x9d, henceforth SPE. Three of these SPEs fit exactly into one Virtual Container-4. Thus signals in the STS-1 signal format can be mapped into an STM-1 frame. Furthermore, frame-aligned STS-1 or STM-1 signals can be multiplexed into higher order STM-N frames.
In general, any lower data rate signal which is combined with other such signals into new data frames of higher rate is referred to as a xe2x80x9ctributaryxe2x80x9d signal. For example in the previous paragraph, the three STS-1 signals which are combined into one STM-1 signal are tributary signals.
Digital Cross-Connect (DCC) functionality provides the possibility of rearranging the temporal (in case of a serial high-rate signal) or the spatial (in case of a demultiplexed high-rate signal) order of the low-rate signals or tributaries within the high-rate signal.
Add/Drop functionality allows to extract and/or replace one or more tributary signals from the high-rate signal. It is also known as Drop/Insert functionality.
A modular, expandable, non-blocking system for cross-connecting high speed digital signals of the SONET is described for example in the U.S. Pat. Nos. 4,967,405 and 5,040,170. The known system includes a SONET bus interface, a virtual tributary cross-connect module which cross-connects virtual tributary payloads in space, time, and phase to generate new SONET formatted signals.
Another approach to DCC for SDH signals is described in European patent application EP-A 0 552 694, albeit on a very high level of abstraction.
Common to both known methods is that the incoming high-rate data signal is demultiplexed down to the desired signal hierarchy, processed (i.e. descrambled, stripped of overhead information, etc.), and after processing received by a (non-blocking) switching network which redirects the incoming signals to arbitrary output lines. Those output signals undergo essential the reverse processing to be multiplexed into the new outgoing high-rate signal. In other words, the mesh or switching network used to rearrange the tributaries is placed in between the disassembling (receive process) and the assembling (transmit process).
It is an object of this invention to provide a structure for a SONET/SDH interconnection system which allows efficient handling of tributary signals transferred in higher-speed signals by blocks of multiple processing modules combined on a chip. It is a further object to provide such SONET/SDH signal handling structure which permits cross-connect and add/drop functionality in a flexible manner in such multi-module arrangements. It is a further object to enable such cross-connect and add/drop functions without completely demultiplexing or disassembling frames.
The objects of the invention are achieved by a system as set forth by the appended claims. The new cross-connect system in its basic variant may be characterized as an essentially parallel arrangement of a plurality of like data processing modules which are capable of processing a part of the high-speed signal, e.g. one tributary or the base signal of a hierarchically ordered signal format (such as the STM-1 signal for SDH) in connection with a configurable multiplexer/demultiplexer (MUX/DEMUX). The MUX/DEMUX can be programmed such as to direct a preselected part of the incoming high speed signal to each of the modules, and vice versa.
Designing a controllable MUX/DEMUX system is in principle a not too difficult task for a skilled person. However, such MUX/DEMUX systems have not been applied to data communication based on signals with a complex and interrelated structure as for example the SONET/SDH signals. These signals do not appear as an xe2x80x9camorphousxe2x80x9d string of bits or bytes, but are organized as frames which include other formatted data signals as payloads, and which have check or control bytes covering the whole frame or at least the complete payload of it. It is hence immediately obvious that the seemingly trivial object of designing a suitable MUX/DEMUX under these circumstances becomes a very complex task, which lead the known solutions to resort to a scheme in which multiplexing is performed in a fixed, unchangeable manner with the cross-connect following at a stage where the high-speed signal has been already disassembled into its lower hierarchy signals or tributaries (see above).
The MUX/DEMUX must therefore be seen in connection with the data processing modules, each of which can operate virtually independently from the others, depending only on the configuration data provided externally. Such data modules for SONET/SDH traffic are described in the international application PCT/EP95/01426 (IBM Docket SZ-9-94-017), filed on Apr. 15, 1995 and assigned to the assignee hereof.
In one embodiment of the invention, the MUX/DEMUX comprises at least two different stages with each stage representing the next lower level of the signal hierarchy (being for example characterized by the speed of the data transmission). Though it is in principle possible to configure a single stage MUX/DEMUX system which reduces the transmission speed in a single stage down the xe2x80x9cbasicxe2x80x9d speed of the data processing module, this is not desirable as the costs and availability of high speed components do not scale linearly. With the disclosed multi-stage design, most of the equipment operates in the low speed environment.
In a preferred embodiment, the MUX/DEMUX system comprises a cascaded pipeline providing each of the modules or each of the MUX/DEMUXs of the subsequent stage with the preselected data.